DMP Electronics eBOX-3350MX-AP Manual de usuario descargar pdf (Pagina 43)

386SX Single Chip PC Jan Yin Chan Electronics Co.,LTD.

DM&P M6117D : System on a chip

Page 42

Jan Yin Chan Electronics Co,. LTD. M6117D 386SX Single Chip PC

8F-1,No.22,Wuchyuan 2RD.,Hsin Chuang city Taipei Hsien, Taiwan, R.O.C. Tel: 886-(02) 2298-0770 Fax: (02) 2299-1883

INDEX 10H

default 00H

Bit Description

7~3 The five bits are used to set the

memory type, the DRAM type is

described in memory type table.

D[7-4]=PM[3-0] & D3=PM4

2 The on board memory 15M ~ 16M-1

0 : enable

1 : disable

1 Two different refresh types: RAS only

or CAS before RAS refresh.

0 : RAS only refresh

1 : CAS before RAS refresh

0 0 : 64KB ROM/EPROM (0F0000~

0FFFFF/ FF0000~FFFFFF)

1 : 128K ROM/EPROM (0E0000~

0FFFFF/ FE0000~FFFFFF)

INDEX 11H

default F8H

Bit Description

7 Memory write access time insert wait

(BWAIT)

0 : disable

1 : enable

6 Memory CAS read access time insert wait

(CASLWT)

0 : disable

1 : enable

5 Slow RAS precharge time

0 : see bit 0 below

1 : 3.5T

4 CAS precharge time insert wait for RAS to

CAS delay (CASHWT)

0 : disable

1 : enable

3 RAS active time insert wait (RWAIT)

0 : disable

1 : enable

2 Memory remap

0 : disable

1 : enable

1 Select re-map mode

0 : split

1 : move-out

0 Fast RAS pre-charge time

0 : 2.5T

1 : 1.5T

INDEX 12H

default 10H

Bit Description

7~4 Split address SP[23-20]

3 reserved

2 Memory read miss RAS to CAS insert

wait (MCASHWT)

0 : disable

1 : enable

1 Shadow RAM 0A0000h~0BFFFFh

read/write control

0 : disable

1 : enable

0 Memory fast write hit insert phase

(FSTWTHIT)

0 : PH2

1 : PH1

1 2 ... 38 39 40 41 42 43 44 45 46 47 48 ... 111 112

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